Test report DSG-3011 · Rev D · tested November 15, 2026

Processors & AcceleratorsDevice under test

AMD Ships EPYC Embedded 9006: Venice Reaches 256 Cores at Launch

AMD's EPYC Embedded 9006 launches day-and-date with commercial Venice, bringing 256 cores, PCIe Gen6 and 7-year availability on the SP7 platform.

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Amara Osei

Spec summary

  1. EPYC Embedded 9006 tops out at 256 cores and 512 threads at 2nm, at up to 600W TDP
  2. First embedded family to launch alongside AMD's commercial server chips on the same platform
  3. SP7 brings 96 PCIe Gen6/CXL 3.1 lanes, 16-channel DDR5-8000/MRDIMM-12800 and 8TB memory capacity
  4. AMD guarantees at least 7 years of availability and will reuse SP7 for the Florence generation
  5. The 128-core EPYC Embedded 9756 ships this month; the other five SKUs follow in late December
AMD Launches EPYC Embedded 9006: Venice Gets an Early Start in Embedded
Fig. AAMD Launches EPYC Embedded 9006: Venice Gets an Early Start in Embedded — chrisci / pixabay

AMD has launched the EPYC Embedded 9006 series with up to 256 cores and 512 threads, marking the first time the company's embedded server chips have shipped at the same time as its commercial EPYC parts. The six-SKU lineup, built on the Zen 6 and Zen 6c architectures and manufactured at 2nm, tops out at 600W and reaches full parity with AMD's best standard server silicon.

The launch caps a broader change in AMD's release cadence. For the Zen 6 generation, server processors now come first: what was once among the last products to ship with a new microarchitecture is now the first, and the embedded line moves with it.

What does the Embedded 9006 platform deliver?

The series adopts the SP7 socket wholesale from the commercial Venice family. That brings:

  • 16-channel DDR5-8000 and MRDIMM-12800 support, with memory capacity rising from 6TB to 8TB
  • 96 lanes of PCIe Gen6 and CXL 3.1 — a first for AMD's embedded platform, though lane count drops from 128 lanes of PCIe Gen5 on SP5
  • Core complexes of 32 cores plus 128MB of cache, up from 16 cores plus 32MB
  • Peak power of 600W, up from 500W on the Embedded 9005 generation
  • AMD's enterprise security feature suite

The generational step from Turin (Embedded 9005, Zen 5c, 3nm) to Venice doubles maximum cores from 192/384 to 256/512.

Availability and lifecycle separate the embedded parts from commercial ones. AMD will offer the 9006 embedded chips for at least 7 years, with support running longer. Because AMD will reuse the SP7 platform for the next generation, codenamed Florence, designs built today can upgrade to newer chips without a full redesign or revalidation. Embedded customers, who move more slowly and conservatively than commercial server buyers, design for multi-year release and even longer support windows. Platform reuse resets that clock.

Which markets is AMD targeting?

AMD names three: automatic test equipment (ATE) for semiconductor development, high-end firewalls, and enterprise storage controllers. All three fall under long-lived infrastructure, and all are tangential to AI demand.

Firewalls need more CPU throughput as agentic AI systems push more data and more complex policies, even with offload acceleration in the appliances. Storage demand rises with AI computing; rack-scale systems rely on dedicated storage boxes, and native PCIe Gen6 support lets controller designs without a PCIe switch extract full performance from the first generation of PCIe Gen6 SSDs.

ATE is the less conventional target. AMD expects a fresh jump in demand there because this generation's technologies — faster DDR5 RDIMMs, MRDIMMs, PCIe Gen6/CXL 3.1 — require new component designs and significant validation work. The market clusters around engineering firms rather than hyperscalers and neoclouds, but AMD is positioned as the first vendor with all these features widely available; Intel remains months away, and Arm-based vendors are still ramping.

Which chips ship when?

The EPYC Embedded 9756, with 128 cores, 3.2GHz base clock, 512MB of L3 cache and a 500W TDP, is available this month. The remaining five SKUs follow in late December:

SKU Cores/Threads Max Boost Base L3 Cache TDP
Embedded 9976 256/512 4.1 GHz 2.55 GHz 1024 MB 600W
Embedded 9966 192/384 4.1 GHz 3.05 GHz 768 MB 600W
Embedded 9846 168/336 4.1 GHz 2.9 GHz 768 MB 500W
Embedded 9756 128/256 4.1 GHz 3.2 GHz 512 MB 500W
Embedded 9656 96/192 4.1 GHz 2.85 GHz 512 MB 400W
Embedded 9556 64/128 5.1 GHz 3.6 GHz 192 MB 400W

Every SKU except the 64-core 9556 tops out at a 4.1GHz boost clock; the 9556 reaches 5.1GHz.

The Venice launch shows how far the embedded line has moved: from one of the last products to launch with a new architecture to one of the first.

via ServeTheHome (Source)

Filed under

  • amd-epyc
  • epyc-embedded-9006
  • venice
  • zen-6
  • sp7
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Amara Osei

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Staff writer covering money, funding and market shifts around hardware layer of artificial intelligence at Die Signal.

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