Test report DSG-6862 · Rev A · tested October 30, 2026

Foundries & ManufacturingDevice under test

TSMC reportedly plans up to 20% CoWoS packaging price rise

TSMC reportedly plans 10% to 20% CoWoS price increases as AI demand strains packaging, testing and equipment, with monthly capacity projected to reach 200,000 wafers in 2027.

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Elena Vasquez

Spec summary

  1. TSMC reportedly plans advanced-packaging price increases of up to 20%.
  2. Foundry and OSAT peers reportedly plan 10% to 20% CoWoS quote increases.
  3. TSMC's monthly CoWoS capacity could exceed 130,000 wafers by 2026 and reach 200,000 in 2027.
  4. Chipmaking-equipment lead times have risen from three-to-six months to six-to-eight months.
  5. On October 27, TSMC reportedly placed equipment orders at original prices without renegotiating.
Strong Demand and Tight Capacity! Taiwan Semiconductor Reportedly Plans to Raise Advanced Packaging Prices by Up to 20%
Fig. AStrong Demand and Tight Capacity! Taiwan Semiconductor Reportedly Plans to Raise Advanced Packaging Prices by Up to 20% — MotazPhotography / pixabay

By Elena Vasquez

Taiwan Semiconductor Manufacturing Co. reportedly plans to raise prices for advanced chip-packaging services by as much as 20%. Its monthly CoWoS capacity is expected to exceed 130,000 wafers in 2026 and reach 200,000 in 2027.

Cailian Press reported the plan on October 27, citing an unnamed media report and industry sources. Edited by Liu Rui, the report said Taiwan Semiconductor and other foundry and outsourced semiconductor assembly and test providers are preparing another round of increases, with planned CoWoS quotes rising 10% to 20%.

CoWoS packaging is widely used in high-end AI processors. Demand has expanded from graphics processing units to server central processing units and custom application-specific integrated circuits, pulling more package types through constrained production and testing lines.

What is tightening packaging supply?

Longer AI-chip testing cycles have intensified pressure on packaging and testing capacity. Lead times for chip-manufacturing equipment have also lengthened from the previous three to six months to six to eight months.

The delay leaves chipmakers scrambling to secure production schedules as equipment suppliers struggle to expand output quickly. Industry insiders said Taiwan Semiconductor's downstream customers no longer have time to haggle: “As long as they can guarantee delivery dates, they place orders.”

For chip designers and system buyers, that changes the procurement priority: a firm delivery date now outweighs another round of unit-price negotiations. The planned 10% to 20% CoWoS increase therefore resets the cost of securing advanced-package capacity, according to the report.

How much additional capacity is coming?

Analysts cited in the report estimate Taiwan Semiconductor's monthly CoWoS capacity could exceed 130,000 wafers by 2026, then increase to 200,000 wafers by 2027. The forecast raises the supply ceiling, but it does not remove near-term scheduling pressure.

At a full-year run rate, 130,000 wafers a month equals about 1.56 million a year, while 200,000 equals 2.4 million. That is roughly 840,000 wafers of additional annual capacity, or 54%, between the two cited levels.

For buyers, the timing remains as important as the volume. Packaging prices rise while equipment lead times stay at six to eight months and test cycles run long, so added capacity may reach constrained customers only after lengthy planning and tool-order cycles.

Why do customers still choose CoWoS?

At the most recent investor conference, Taiwan Semiconductor Chairman C. C. Wei said: “At this stage, CoWoS remains the customers’ top choice.” He said competing solutions remain competitive, but Taiwan Semiconductor is the only manufacturer to have achieved mass production at a five-times mask size.

Wei said the company's five-times mask-size packaging is now in mass production and described its yields as excellent. Taiwan Semiconductor continues to develop nine-times and fourteen-times mask-size solutions while advancing CoPoS technology for larger-size packages and future cost reduction.

Wei's comments put manufacturing scale and yield at the center of TSMC's competitive position, not price. Rival solutions remain competitive, but the report cites a distinct mass-production claim at five-times mask size and development work extending to 14 times.

What does the equipment procurement reversal show?

Upstream equipment suppliers said Taiwan Semiconductor historically used its annual procurement round to ask for lower prices. If prices stayed unchanged, the company often requested additional equipment features.

This year, Taiwan Semiconductor did not renegotiate prices or alter equipment specifications and functionality. It placed orders at the original prices, reversing the prior negotiating pattern and, in the report's assessment, underscoring the strength of current demand.

For equipment vendors, the change means orders arrive on the supplier's existing commercial terms. For semiconductor buyers, it reinforces the direction of the market: AI-related demand now affects equipment access, packaging allocation and package pricing at the same time.

via Google News: Semiconductor supply chain (Source)

Filed under

  • tsmc
  • cowos
  • advanced-packaging
  • ai-processors
  • semiconductor-pricing
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Elena Vasquez

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Senior reporter covering people, launches and day-to-day practice in hardware layer of artificial intelligence at Die Signal.

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