A Samsung executive said the company expects high-bandwidth memory to account for nearly 30% of global DRAM capacity next year, a forecast that signals mounting pressure on supply of conventional DRAM products.

The figure marks a substantial reallocation of manufacturing capacity across the memory industry. HBM, the stacked DRAM architecture used in AI accelerators and high-performance computing platforms, consumes significantly more wafer output per bit than standard DRAM because of its multi-die construction and lower yields. As producers convert lines to HBM, the capacity available for conventional DDR modules and graphics memory shrinks.

That dynamic is the core of the supply pressure the Samsung executive described. When nearly a third of global DRAM capacity serves HBM production, the remaining output must cover demand from servers, PCs, smartphones, and consumer electronics — segments that still account for the bulk of DRAM bit consumption.

Capacity Conversion Mechanics

HBM production imposes a capacity multiplier effect. Each HBM stack integrates multiple DRAM dies, and yields on through-silicon via assembly and stacking remain below those of monolithic standard DRAM. Producing a given volume of HBM bits therefore absorbs several times the wafer capacity required for the same bits of conventional DRAM.

Industry-wide adoption of this shift means the effective supply of standard DDR5 and other conventional products contracts even if total wafer starts hold steady. Buyers of server and client memory face a tighter balance as a result.

Implications for Buyers

For OEMs and memory purchasers, the forecast suggests several practical considerations:

• Conventional DRAM pricing may face upward pressure as capacity migrates to HBM.
• Contract negotiations for next year should account for a structurally tighter supply base.
• Product roadmaps dependent on standard DRAM availability could see allocation constraints if AI-driven demand for HBM continues to expand.

The executive's projection aligns with the broader industry trajectory: memory makers have prioritized HBM allocation to serve AI accelerator demand, and that priority now visibly reshapes the capacity mix for the entire DRAM market.

What to Watch

Three indicators will test the forecast over the coming quarters: the pace of HBM capacity additions by major producers, yield improvements in stacking processes that could moderate the capacity multiplier, and bit-demand trends in conventional segments such as smartphones and PCs.

If HBM reaches the projected share of capacity, the DRAM market will effectively split into a high-bandwidth segment driven by AI infrastructure spending and a conventional segment operating on a reduced supply base. Memory buyers, module makers, and system integrators should plan procurement strategies accordingly.

The near-30% capacity figure, coming from a senior Samsung executive, represents one of the more concrete quantifications to date of how far the HBM transition has progressed from a niche product line to a dominant claim on global DRAM manufacturing resources.