HBM4 contract prices are set to nearly triple by 2027, with South Korean memory makers driving the long-term deal push, according to supply chain sources cited by DIGITIMES.

The Taipei-based trade publication reported the development on Oct. 6, 2026, at 09:53, under the headline "HBM4 prices to nearly triple in 2027, memory makers see windfall margins spread." Siu Han filed the story from Taipei.

What does the preview actually say?

DIGITIMES gated the full body of the Oct. 6 article behind a paid subscription wall. The publicly visible preview reads: "Memory supply and demand will tighten further in 2027. According to supply chain sources, South Korean memory makers have recently quoted aggressive long-term contract prices for sixth-generation high-bandwidth memory (HBM4)."

That preview sentence is the entirety of the source material outside the headline.

How steep is the price move?

The headline frames the contracts at roughly three times prevailing levels. A "near triple" move on HBM4 long-term deals sets a new pricing band for the stacked DRAM category heading into 2027.

HBM4 stacks DRAM dies vertically on a base logic die to feed AI accelerators with high-throughput data. The product category sits at the top of the memory hierarchy, separated from commodity DDR5 by per-bit pricing, packaging complexity, and qualification barriers.

Which suppliers are setting the curve?

The preview paragraph names "South Korean memory makers" without naming individual vendors. South Korea's two principal memory suppliers — Samsung Electronics and SK hynix — are the only firms with publicly disclosed HBM4 qualification roadmaps.

A companion DIGITIMES story on Oct. 5, 2026 — headlined "Samsung reportedly seeks more than triple HBM prices for 2027 as HBM4 ramps" — corroborates the Samsung side of the Korean pricing push from the same news cycle.

What does "windfall margins spread" mean?

DIGITIMES frames the development as a "windfall margins spread" across memory makers. The phrasing implies the margin uplift extends across the HBM supplier base rather than concentrating at one vendor.

In tight HBM markets, contract pricing tends to converge across qualified suppliers. Each percentage point of utilization produces outsized gross-margin swings because of premium product mix and packaging complexity relative to commodity DRAM.

How does this fit the broader 2027 chip pricing cycle?

HBM contract step-ups form one strand of a wider 2027 memory and silicon price cycle. DIGITIMES's own weekly roundup on Oct. 5 noted "AI chip boom drives capacity expansion," framing memory demand as the binding constraint on accelerator throughput.

A separate DIGITIMES item covered TSMC's disclosure of 3-6% wafer-out price hikes for 2027, which sits in the same broader pricing cycle. Advanced packaging, wafer-out, and HBM content costs all drift upward together as 2027 approaches.

What does the article leave unanswered?

The paywalled body of the Oct. 6 piece likely carries the granular supply-chain sourcing on customer-by-customer contract pricing, stack-height breakdowns, and qualification timing — none of which sits in the visible preview.

For now, the trade-press record on HBM4 contracts for 2027 rests on this headline-plus-preview combination plus the parallel Samsung-focused Oct. 5 story from the same DIGITIMES cycle. Subscribers with access can confirm the full contracting picture.