Former Intel CEO Pat Gelsinger has renewed his attack on high-bandwidth memory (HBM, the stacked DRAM used next to AI accelerators), calling out its poor bit density and thermal problems—and in the same breath conceding it remains the only viable option for today's AI hardware.

By Grace Kim, Die Signal

It's a rare thing in the semiconductor trade: a former chief executive publicly trashing a technology his old company's rivals depend on, then admitting everyone still has to use it. That's exactly what Gelsinger did in his latest comments on HBM, first reported by BigGo Finance under the headline "Former Intel CEO Slams HBM Again: Poor Bit Density, Thermal Woes—Yet Still the Only Option."

What's the actual complaint?

Gelsinger's criticism rests on two engineering objections, both familiar to memory designers.

• Bit density. HBM stacks DRAM dies vertically and places them close to the compute die, but the packaging overhead—through-silicon vias (vertical interconnects between stacked dies), logic base dies, and interposers—means the memory delivers fewer usable bits per unit of area than conventional DRAM. In Gelsinger's framing, you pay a steep premium in silicon real estate for the bandwidth.
• Thermals. Stacked dies trap heat. Heat generated in lower layers must pass through the layers above it to escape, which forces conservative power budgets, aggressive cooling, or both. For AI accelerators already pushing cooling limits, HBM adds another constraint on top of the GPU itself.

This isn't Gelsinger's first pass at the topic—the word "again" in the original report is doing real work. He has previously questioned the cost-efficiency of HBM-centric memory hierarchies, and his position has stayed consistent even as the market moved the other way.

Why slam it and still endorse it?

Here's the practical question every reader in this sector should ask: what does this change for AI hardware roadmaps? On the evidence of Gelsinger's own comments—nothing, and that's the point.

HBM's core value proposition is bandwidth. Placing memory centimeters from the compute die, connected over a wide interface, lets accelerators feed data orders of magnitude faster than discrete DDR modules on a board. No shipping alternative matches that today. Competing approaches—CXL-attached memory (a cache-coherent interconnect for pooling memory), processing-in-memory, or advanced multi-chip packaging of conventional DRAM—remain earlier on the maturity curve.

So the critique lands as an engineering observation, not a market call. Gelsinger isn't telling designers to drop HBM. He's flagging that the industry has converged on a component with known structural weaknesses because the alternative—starving AI accelerators of bandwidth—is worse.

Context that matters

Intel itself sat out the leading edge of the HBM race during Gelsinger's tenure as CEO from February 2021 to December 2024. The dominant HBM suppliers are SK Hynix, Samsung, and Micron, with SK Hynix holding the strongest position in supply to the largest AI accelerator vendors. Intel's accelerator lines used HBM where needed, but the company never fielded a mainstream AI GPU at the volume of its chief rival, Nvidia, whose top-end modules are among the most HBM-hungry products in the industry.

That history cuts both ways. Critics can read Gelsinger's comments as sour grapes from a leader whose company missed a wave. Supporters can read them as straight talk from an insider who knows exactly what the packaging and thermal teams wrestled with.

The takeaway

Gelsinger's line—poor density, bad thermals, still the only option—is effectively the industry's own position, stated more bluntly than most vendors would. Memory makers keep shipping HBM in volume. Accelerator designers keep specifying it. The objections he raises are real constraints that show up in power budgets and board designs, not reasons to switch.

Until a bandwidth-comparable alternative matures, expect the same pattern: public complaints about HBM's physics, paired with purchase orders for HBM stacks. Gelsinger just said the quiet part out loud.