Test report DSG-3809 · Rev B · tested October 10, 2026
Memory & StorageDevice under test
Micron: NVHBM Margins to Rise Even With Outsourced Base Die
Micron told The Elec that its NVHBM product line will lift profitability even with an externally sourced base die, addressing the central cost question for next-generation high-bandwidth memory.
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- Priya Raman
Spec summary
- Micron told The Elec that its NVHBM product will improve profitability even with an outsourced base die.
- The base die houses the PHY and manages the through-silicon vias in an HBM stack.
- SK hynix, Samsung, and Micron have historically fabricated HBM base dies in-house.
- HBM demand is driven primarily by AI accelerators from Nvidia and hyperscaler custom silicon.
- HBM4 is expected to require a more capable base die than current generations.

Micron Technology told The Elec that its NVHBM product line will lift profitability even when the base die is sourced from an external foundry.
The headline statement, reported by the Korean electronics trade publication, targets the central cost question for next-generation high-bandwidth memory: whether handing the logic die to a third-party foundry erodes the margin profile Micron has been building toward.
What does the base die do in an HBM stack?
The base die sits beneath the vertically stacked DRAM layers in an HBM package. It carries the PHY, manages the through-silicon vias (TSVs) that connect each die in the stack, and handles signal-integrity and thermal functions. SK hynix, Samsung, and Micron have all historically fabricated this die in-house on the same production line as the memory array.
Outsourcing that die to a dedicated logic foundry — typically on a leading-edge node such as TSMC's N5 or N3 — gives the memory supplier access to more advanced process geometry than its DRAM node offers. The cost is the loss of vertical integration and a portion of the die margin.
Why does the statement matter?
By framing the outsourced base die as compatible with improved profitability, Micron is signaling three operational points:
- The HBM price premium over conventional DDR DRAM absorbs the incremental foundry cost.
- Volume contribution from the product offsets the loss of captive die margin.
- The company has negotiated wafer pricing with its foundry partner that preserves the margin profile.
The Elec headline does not name a foundry, specify a process node, or set a timeline. Industry coverage has pointed to TSMC as the most likely candidate for advanced-node base die work, but Micron has not confirmed any specific partner in the headline statement.
What is the broader market picture?
HBM has become a structural component for AI accelerators. Nvidia's GPU lineup and custom tensor-processing silicon from the major hyperscalers consume the bulk of global HBM output. SK hynix led the HBM3 generation and has held the largest market share; Micron entered HBM3E later but reported qualification on Nvidia's Blackwell platform.
The next node, HBM4, is expected to introduce a more capable base die with active silicon to support higher per-stack bandwidth and larger capacities. Separately fabricating that die allows the memory supplier to choose a logic process more advanced than its DRAM roadmap, which typically lags by one to two nodes.
Micron's claim that outsourced-base-die economics improve profitability rests on three assumptions: that HBM ASPs hold, that volume scales, and that foundry pricing stays competitive. The claim will be tested against actual product shipments. Until volume production begins, the figure remains a forecast, not a result.
via Google News: HBM memory (Source)
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