TSMC Weighs CoWoS Price Hikes Up to 20%, NVIDIA Reportedly Signs Off

By Priya Raman

TSMC is reportedly considering price increases of up to 20% on its CoWoS advanced packaging services, and NVIDIA has already approved the higher rates. The hikes would apply from 2025 onward, with further increases for 2026 reportedly under discussion.

The report cites unnamed research findings. TSMC has not confirmed the figures. Every number here carries that caveat.

What is CoWoS and why does it cost more?

CoWoS stands for Chip on Wafer on Substrate. The process places multiple chips side by side on a silicon interposer (a thin layer packed with fine electrical connections), which then sits on a substrate. The result: separate chips behave as one large device.

That property matters for AI workloads. These workloads constantly move huge volumes of data between processor and memory, and CoWoS shortens that path. Without adequate CoWoS capacity, AI accelerators cannot ship, regardless of how many logic wafers TSMC produces.

How large are the increases and who agreed?

The reported increases fall in a range of 10-20% for CoWoS services. The adjustments reportedly apply from 2025 onward.

The notable detail is sign-off. TSMC has received approval for the higher prices from major customers, including NVIDIA, per the findings. Customer consent suggests limited alternatives rather than enthusiasm.

Discussions about further increases in 2026 are reportedly ongoing.

Will capacity catch up with demand?

TSMC's CoWoS output is projected to reach 120,000-130,000 wafers per month by late 2026. Even at that level, demand is expected to exceed supply by roughly 10-20%.

TSMC's CEO has stressed that demand remains much higher than supply. The findings point to a bottleneck lasting until at least 2028.

TSMC is also outsourcing portions of its CoWoS-S process through partnerships:

• A $2 billion, five-year agreement with GlobalFoundries
• GlobalFoundries will produce silicon interposers at its facility in Malta, New York
• Production is targeted to begin in 2028, with ramp-up aimed at the first half of that year

The deal gives TSMC a US-based interposer source. That matters as supply chain location increasingly weighs on chip buyers' decisions.

Is the rest of the market moving too?

ASE Technology and other OSATs (outsourced semiconductor assembly and test providers) have raised their advanced packaging quotes by more than 20% for 2026, according to the findings. That ceiling sits above TSMC's reported range.

The pressure lands hardest on NVIDIA and AMD. Their cost structures depend heavily on access to advanced packaging capacity.

What does this mean for AI accelerator buyers?

The direct cost impact looks modest on paper. Packaging price increases are expected to lift bill-of-materials costs for AI accelerators by approximately 2-4.5%.

Two figures deserve scrutiny:

• Whether the reported 2026 increases materialize
• Whether capacity actually reaches the 120,000-130,000 wafers-per-month target

If capacity lands short, the 10-20% demand gap could widen rather than close. A projection is not a commitment.

The 2028 timeline is the structural fact. GlobalFoundries' interposer production starts that year, roughly when the bottleneck is expected to ease. Buyers may face a seller's market in advanced packaging until then.