Taiwan Semiconductor Manufacturing Company has reportedly started pilot production of 1.4nm-process chips, with volume manufacturing targeted for 2028, according to a Wccftech report distributed via Google News syndication.

The disclosure carries no official TSMC confirmation. The article cites unnamed industry sources rather than company filings or executive statements. No customer names, wafer pricing, or yield projections accompany the claim.

What does pilot production actually mean?

Pilot production occupies the manufacturing stage between research-and-development silicon and commercial high-volume manufacturing. Wafers run in limited quantities — typically thousands per month rather than tens of thousands — through tooling configurations designed to mirror the eventual volume fab.

Engineers use pilot runs to validate three primary metrics: transistor performance against design targets, defect density at relevant process corners, and tool uptime across the equipment fleet. A node that reaches pilot production has cleared internal device-characterization milestones but has not yet demonstrated the cost and yield profile required for customer product ramps.

The transition from pilot to high-volume manufacturing usually spans 18 to 36 months, driven by defect-learning curves and procurement timelines for advanced lithography equipment.

How does the "1.4nm" label work?

The figure follows TSMC's marketing nomenclature, which has not corresponded to literal transistor dimensions since the company moved past the 20nm node. Each new designation signals a generation of density scaling, power reduction, or architectural change. The industry has broadly accepted this convention even as actual gate lengths and metal pitches remain considerably larger than the marketing numbers suggest.

If the report is accurate, a 1.4nm node would represent the next full-node generation in TSMC's logic roadmap, succeeding the N2 (2nm-class) process the company has positioned for volume production later this decade.

Why does the 2028 target matter?

A 2028 volume-production window places the 1.4nm node roughly two years beyond TSMC's publicly announced N2 schedule. That gap aligns with the company's typical cadence of two years between full-node introductions. Each transition has historically delivered density gains in the range of 15 to 30 percent, though TSMC has not disclosed figures for unreleased nodes.

The 2028 horizon also determines the equipment-supplier pipeline. Extreme-ultraviolet lithography systems from ASML, including high-NA EUV tools, would form the backbone of a 1.4nm fab. Lead times on those systems already extend beyond 18 months.

What the report does not say

Wccftech's article omits several items that would normally accompany a confirmed node announcement:

• No process specifications: transistor density, SRAM scaling, or power/performance figures
• No fab location: TSMC operates facilities in Hsinchu, Tainan, and Arizona, all candidates for new-node ramps
• No customer commitments: leading-edge nodes typically draw Apple, NVIDIA, AMD, and Qualcomm
• No capex figures: each generation has historically required multi-billion-dollar facility investment

Until TSMC confirms the report, the 1.4nm pilot-production timeline remains a rumor. The company's official disclosure pattern — typically a quarterly earnings call or dedicated technology symposium — has not yet addressed a 1.4nm node by that name.

What to watch next

Two events would clarify the timeline. TSMC's annual technology symposium, normally held in the second quarter, has historically been the venue for new-node announcements. The company's 2026 capex guidance, due with fourth-quarter earnings in January, would also signal whether the 1.4nm pilot line has moved from rumor to budgeted investment.