Elon Musk has cut the memory requirements for Tesla's next-generation AI chips, reducing the specification for the AI5 chip by half to 72 GB and lowering the AI6 chip's requirement by a third to 144 GB.

The reduction marks a significant revision to Tesla's silicon roadmap. The AI5 chip, which previously carried a 144 GB memory requirement, will now ship with half that capacity. The AI6 chip, originally specified at 216 GB, comes down to 144 GB following the adjustment.

Musk stated that the performance of the Optimus humanoid robot will not be affected by the reduced memory allocations. Tesla is developing both AI chips as the compute foundation for its autonomy programs, including the Optimus robot and the company's driver assistance stack.

The memory cuts carry direct implications for Tesla's supply chain and unit economics. Memory is one of the dominant cost drivers in AI inference silicon, and halving the requirement on AI5 materially reduces the bill of materials for every unit produced. At Tesla's intended deployment scale — spanning vehicle fleets and mass production of Optimus robots — the savings compound across millions of units.

Lower memory footprints also reduce thermal load and board complexity, factors that matter in both automotive-grade hardware and humanoid robot form factors where power budgets and physical space are constrained.

Tesla has positioned AI5 and AI6 as successive generations of in-house inference processors, designed to run the company's neural network workloads locally rather than relying on cloud compute. The Optimus program in particular depends on efficient onboard inference, since the robot must process vision, balance, and manipulation tasks in real time without external datacenter support.

Musk's claim that Optimus performance will remain unaffected suggests the underlying neural network models fit within the revised memory envelope — likely a result of model optimization, quantization, or architectural changes to the inference software stack rather than a trade-off in capability.

For Tesla's hardware partners, the revised specifications change procurement volumes for high-bandwidth memory. A 50 percent reduction on AI5 and a 33 percent reduction on AI6 translate directly into lower demand per unit across the production lifecycle of both chips.

The timing aligns with Tesla's broader push to control silicon design in-house. By specifying its own memory requirements and revising them downward as software efficiency improves, Tesla avoids paying for headroom it does not use — a discipline the company has applied across its vehicle electronics and powertrain programs.

The revised targets position AI5 at 72 GB and AI6 at 144 GB. Both chips remain central to Tesla's plans for autonomous driving compute and the Optimus robot line.