Test report DSG-4253 · Rev D · tested October 3, 2026

Processors & AcceleratorsDevice under test

Tesla Cuts AI5 Chip Memory to 72GB as DRAM Supply Tightens

TrendForce reports Tesla halved AI5's LPDDR5 to 72GB and cut AI6's LPDDR6 by one-third, as tightening DRAM supply forces spec reductions across AI silicon.

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Elena Vasquez

Spec summary

  1. Tesla halved AI5 chip's LPDDR5 capacity to 72GB, down from 144GB
  2. Tesla cut AI6 processor's LPDDR6 allocation by one-third before production
  3. TrendForce attributes both reductions to tightening memory supply in the DRAM market

Tesla has halved the LPDDR5 memory capacity of its AI5 inference chip to 72GB, according to TrendForce. The company has also cut the LPDDR6 allocation of its next-generation AI6 processor by one-third. Both reductions respond to tightening memory supply across the DRAM market.

The AI5 figure is the more concrete of the two disclosures. At 72GB after the reduction, the original design specified 144GB of LPDDR5 per chip. The AI6 cut applies to a processor that has not yet shipped; TrendForce did not publish the absolute LPDDR6 capacity before or after the one-third reduction.

The move signals how AI accelerator programs now compete directly with other large buyers for low-power DRAM. LPDDR5 and its LPDDR6 successor sit at the intersection of two demand streams: high-bandwidth mobile SoCs and server-class AI inference hardware. When supply contracts, designers must either pay more per gigabyte or accept less memory per part.

Tesla appears to have chosen the second path. For an automaker building out its AI compute fleet, per-chip memory capacity affects model serving throughput, batch sizes, and the number of inference nodes required to hit a given performance target. Halving capacity to 72GB does not necessarily halve capability — workloads can spill to on-package storage or distribute across more nodes — but it raises the total part count, power draw, and system cost for any fixed workload.

The AI6 reduction carries longer-term weight. That processor is Tesla's follow-on platform, and constraining its memory budget at the design stage locks in a tighter envelope for the hardware generation that follows the current fleet. A one-third cut decided before volume production is cheaper to absorb than a mid-cycle change, but it still caps what the silicon can address.

TrendForce attributes both decisions to memory supply tightening. That condition has been building across the DRAM industry as manufacturers shift wafer allocation toward HBM and high-margin server products, squeezing conventional and low-power DRAM output. Buyers without long-term supply agreements face the sharpest constraints, and spec revisions of this kind are the visible result.

For the broader market, Tesla's decision functions as a data point on how far the shortage has propagated. When a buyer of Tesla's scale reduces memory on shipping and near-future silicon rather than bidding up spot pricing, it indicates that price alone is no longer clearing the market for these parts.

The revision also sets a benchmark for competitors. Any vendor building AI inference silicon on LPDDR5 or LPDDR6 now faces the same supplier math Tesla did. Chips designed around generous low-power DRAM allocations may see similar spec reductions, launch delays, or cost increases if the supply environment does not ease.

What remains unknown from the TrendForce report is the timeline. The publication did not state when the AI5 revision takes effect in production units, nor when AI6 is scheduled to reach volume manufacturing. It also did not specify which memory suppliers Tesla works with for either part.

The hard numbers stand regardless: AI5 drops to 72GB of LPDDR5, half its original capacity, and AI6 enters its pre-production phase with one-third less LPDDR6 than previously planned. Both changes trace back to a single cause — DRAM supply that can no longer meet demand at existing specifications.

via Google News: AI chip (Source)

Filed under

  • tesla
  • ai5
  • ai6
  • dram
  • lpddr5
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Elena Vasquez

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Senior reporter covering industry trends and analytics at Die Signal.

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