Test report DSG-7900 · Rev C · tested October 16, 2026

AI Datacenter InfrastructureDevice under test

Intel's D-Series Datacenter GPU Brings 480GB Memory to AI

Intel's new D-Series datacenter GPU carries 480GB of LPDDR5X and 32 Xe3P cores, with stated support for AI models of up to 300 billion parameters.

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Amara Osei

Spec summary

  1. Intel unveiled the GPU D-Series for AI datacenters.
  2. The card carries 480GB of LPDDR5X memory.
  3. Compute configuration is 32 Xe3P cores.
  4. Intel lists support for models of up to 300 billion parameters.
Intel Unveils GPU D-Series For AI Datacenters, Featuring 480GB LPDDR5X, 32 Xe3P Cores & 300B Parameter Support - Pokde.N
Fig. AIntel Unveils GPU D-Series For AI Datacenters, Featuring 480GB LPDDR5X, 32 Xe3P Cores & 300B Parameter Support - Pokde.N — AI-generated

Intel has unveiled the GPU D-Series for AI datacenters, and the headline specification is memory capacity: 480GB of LPDDR5X on a single card. That figure positions the accelerator for inference workloads on large models, with Intel listing support for models of up to 300 billion parameters.

The announcement, reported by Pokde.Net, gives the D-Series a compute configuration of 32 Xe3P cores. The "Xe3P" designation places the part in Intel's next generation of Xe graphics architecture, succeeding the cores found in the company's current datacenter and client GPU lines.

What does the memory capacity change?

The 480GB figure is the number that matters most for deployment decisions. Large language models in the 300B-parameter class typically demand substantial memory to hold weights and key-value caches, and capacity constraints often dictate whether a model runs on one accelerator or several.

By certifying support for 300B-parameter models, Intel signals that the D-Series targets exactly that tier of workload — single-system or single-card inference for models that previously required partitioning across multiple GPUs.

LPDDR5X, rather than the HBM found on competing high-end accelerators, is the second notable choice. The memory type trades peak bandwidth for capacity and cost efficiency, a trade-off that aligns with inference-first deployments where large models run at moderate batch sizes.

What do we know about the compute side?

The confirmed compute specification is 32 Xe3P cores. Intel has not, in the material surfaced so far, published complete figures for clock speeds, memory bandwidth, interconnect or power envelope. The core count and architecture name remain the concrete data points.

The takeaway in plain terms: the D-Series is built around a large memory pool attached to Intel's newest GPU cores, with the explicit goal of hosting very large models.

Where does this fit in Intel's accelerator line?

The D-Series name marks a distinct product family for AI datacenters. Intel's earlier datacenter GPU efforts centered on the Max Series and the Gaudi accelerator line, the latter acquired through Habana Labs. The D-Series, with Xe3P cores and a half-terabyte-class memory configuration, represents a new entry point in that portfolio.

For datacenter operators, the relevant comparison points are straightforward:

  • Memory capacity per card: 480GB LPDDR5X
  • Compute configuration: 32 Xe3P cores
  • Model support: up to 300B parameters

What remains open?

Several questions will determine the card's competitive standing: pricing, availability dates, measured inference throughput, memory bandwidth figures, and software-stack maturity for the Xe3P architecture. None of these figures appear in the announcement material currently available.

Intel also has not yet stated which server platforms will carry the D-Series first, nor whether the part will appear in cards from multiple OEM partners.

The one-line summary: Intel has staked its new datacenter GPU's claim on capacity — 480GB per card, rated for 300-billion-parameter models.

via Google News: GPU datacenter (Source)

Filed under

  • intel
  • gpu
  • datacenter
  • ai-inference
  • lpddr5x
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Amara Osei

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Staff writer covering money, funding and market shifts around hardware layer of artificial intelligence at Die Signal.

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