Test report DSG-4297 · Rev F · tested October 10, 2026
Memory & StorageDevice under test
SK hynix Resumes DRAM Packaging Outsourcing to WINPAC After Four Years
SK hynix has resumed DRAM flip-chip packaging outsourcing to WINPAC after four years, with DDR4 and DDR5 mass production underway at a P Campus now running at 50 million units per month.
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Spec summary
- SK hynix resumed packaging outsourcing to WINPAC on September 29 after a four-year break, adding it as a second partner after A-PROTECH.
- Outsourced products are DDR4 and DDR5 DRAM flip-chip packages; WINPAC raised P Campus monthly capacity from 44 million to 50 million units.
- WINPAC posted cumulative operating losses above 60 billion won from 2023 to 2025 and repaid over 40 billion won in debt before returning to monthly operating profit in March.
- Industry estimates put WINPAC's 2024-base revenue at 75.547 billion won, with this year's revenue expected above 110 billion won and possibly over 150 billion won.
- Through H1 2021, 61% of WINPAC's revenue came from SK hynix.
SK hynix has resumed memory packaging outsourcing to WINPAC after a four-year break, adding the OSAT provider as its second external flip-chip partner and starting mass production of DDR4 and DDR5 DRAM packages at WINPAC's P Campus, industry sources said on September 29.
SK hynix had already expanded both the volume of DRAM flip-chip packaging sent to external partners and the number of partners, following its first arrangement with A-PROTECH. WINPAC signed the contract, configured equipment at the P Campus and moved into mass production.
The P Campus handles packaging for high-performance products including DRAM, NAND flash and eUFS. WINPAC recently raised monthly capacity from 44 million units to 50 million units.
Why did the relationship restart now?
"SK hynix has improved its relationship with WINPAC and resumed packaging outsourcing with the company after four years," an industry source said. "Demand for outsourced packaging has increased significantly as conditions in the memory market have improved sharply. WINPAC's ability to secure working capital needed to operate equipment and maintain production processes through restructuring also appears to have played a major role."
The two companies share a long history. Founded in 2002, WINPAC grew on SK hynix volumes, handling 144-ball BGA packages, board-on-chip packaging for DDR2 and DDR3 DRAM, multi-chip packages and semiconductor testing. It began mass production of flip-chip packaging in 2019. Through the first half of 2021, 61% of its revenue came from SK hynix.
The relationship soured in 2022 after WINPAC won its first outsourced order from Samsung Electronics and struggled to supply SK hynix while serving the new customer. SK hynix cut volumes, and the tie-up ended in 2023 as the memory downturn deepened.
What did the break cost WINPAC?
Memory back-end utilization fell to 20–25% during the downturn. Fixed costs, including depreciation on high-priced equipment, kept flowing through as losses of roughly 20 billion won per year, and cumulative operating losses from 2023 through 2025 exceeded 60 billion won.
"If losses continue, it becomes difficult to obtain bank loans or raise funds, and customers are also reluctant to assign large-scale mass-production volumes," another industry source said. "The company needs to resolve financial uncertainties and secure funds to operate mass-production lines before it can win new orders."
Since last year WINPAC has sold unneeded equipment and assets, cut fixed costs through voluntary resignations and repaid more than 40 billion won in debt. It turned to a monthly operating profit in March this year and now counts both of South Korea's largest memory makers as customers.
What is the financial outlook?
Industry estimates put WINPAC's annual revenue this year at more than 110 billion won, nearly 50% above the 75.547 billion won it recorded last year. If testing volumes and overseas orders expand further, revenue could exceed 150 billion won.
Flip-chip packaging forms metal bumps of several tens of micrometers on a chip's surface and connects it face-down to a substrate. Compared with wire bonding, it shortens signal paths, cuts data loss and latency and supports more I/O pins in thinner, smaller packages.
via cdn.thelec.net (Original)
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