Test report DSG-2412 · Rev C · tested October 10, 2026
Processors & AcceleratorsDevice under test
Semifive signs $52M ASIC deal with unnamed US AI firm
Semifive signed a $52M contract with an unnamed US AI fabless firm for an LPDDR6 and PCIe Gen5 AI inference accelerator. The deal is the South Korean ASIC firm's largest, contributing about 60% of H1 2026's $88M in new-order revenue. Tape-out H1 2027.
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- Amara Osei
Spec summary
- $52 million contract value, Semifive's largest deal to date
- Represents about 60% of the company's $88 million in H1 2026 new-order revenue
- Inference accelerator uses LPDDR6 memory and PCIe Gen5 host interface
- Tape-out scheduled for H1 2027; mass production slated for 2028
- Target market: hyperscalers and cloud service providers
Semifive has signed a $52 million contract with an unnamed US-based AI fabless firm to co-develop a next-generation AI inference accelerator, the South Korean ASIC company disclosed this week.
The agreement is the largest contract in Semifive's history and accounts for roughly 60 percent of the $88 million in new-order revenue the company booked during the first half of 2026.
What is the "Spec Hand-off" model?
The project marks Semifive's first Spec Hand-off engagement in North America. Under that model, the customer defines the performance targets and target specifications, and Semifive then takes responsibility for the entire downstream pipeline: design, software development, packaging, testing, and mass production.
Semifive positions the framework as an earlier-stage entry point than the traditional turnkey agreement, in which a customer typically carries the chip through final design before outsourcing the physical-implementation and manufacturing phases. The condensed handover pushes architecturally significant decisions further upstream, into Semifive's own engineering teams.
What does the accelerator contain?
The inference chip will pair LPDDR6 memory — a next-generation low-power DRAM standard — with a PCIe Gen5 host interface. Semifive selected LPDDR6 specifically to cut the power draw of the memory subsystem, while Gen5 links cut data-transfer bottlenecks in high-volume CPU-to-accelerator traffic.
Semifive said the architecture targets both high compute throughput and operational stability, a combination aimed at 24/7 inference workloads at large data-center operators. The two companies will sell the resulting silicon into hyperscalers and cloud service providers.
When will the chip tape out?
Semifive is targeting tape-out in the first half of 2027 and mass production in 2028. The announcement does not specify the process node, foundry partner, or expected wafer allocation.
What does the deal signal?
The contract arrives as the AI inference market continues to expand rapidly, with demand accelerating for custom silicon tuned to each customer's services and workloads, Brandon Cho, CEO and co-founder of Semifive, said. By successfully commercializing this next-generation inference accelerator and improving the economics of large-scale AI models, Semifive aims to establish itself as an essential custom silicon development partner for the global hyperscale infrastructure market, Cho added.
For Semifive, the deal underlines a pivot toward higher-touch, US-led AI customers. For the unnamed buyer, it externalizes a full chip-design build to a South Korean partner. Spec Hand-off gives such customers a tighter interface at the architecture stage than the typical turnkey flow.
What information remains undisclosed?
The customer name remains confidential. The $52 million figure is the headline contract value disclosed by Semifive; the company has not broken it down into non-recurring engineering and unit-volume components. Process node, package type, and estimated annual shipments are likewise omitted from the announcement.
via Data Center Dynamics (Source)
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