Nvidia's new Vera CPU delivers 1.5 times the performance of AMD's Epyc systems in early electronic design automation testing, and the company is deploying it across the workflows that will design its future chips, including its next-generation Rosa CPU due in 2028.

Tim Costa, vice president and general manager of computational engineering at Nvidia, announced the deployment while speaking with journalists on a video call. He framed the move around a scale problem: by 2030, the industry is expected to produce 2 trillion chips and process about 41 million wafers per month, while individual packages approach a trillion transistors and full computing systems head toward quadrillion-transistor counts.

Bringing a chip to market can still take years, with engineers spending years on simulation, verification, and implementation — a lifetime in the accelerated age of AI.

What does the complexity problem look like?

"The key point is not any one number; it's the interaction of scale, architecture, packaging, and system complexity," Costa said. "The traditional design process just can't keep pace with that scale of challenge. To meet it, AI and accelerated computing are moving from productivity tools into being foundational engineering infrastructure."

He emphasized that chip design decisions ripple across the entire stack.

"Decisions in chip architecture affect atomic-scale manufacturing, advanced packaging power, thermals, and the behavior of the complete system," Costa said. "AI helps engineers explore far more design alternatives and make better decisions across those interactions. Accelerated computing makes the high-fidelity simulation, validation, and optimization behind those decisions fast enough to repeat."

Rather than replacing physics or design rules, AI puts those checks into the loop and runs them more often. "The opportunity is to accelerate the full engineering loop, not isolated tools," Costa said.

What is Vera?

Vera is Nvidia's Arm-based CV100 CPU, and the company is now using it to accelerate future generations of its CPUs and GPUs in collaboration with EDA vendors Cadence and Synopsys. Key specifications:

• 88 custom "Olympus" CPU cores designed by Nvidia
• 1.2 TB/sec LPDDR5X memory subsystem
• Second-generation Scalable Coherency Fabric mesh interconnect for per-core performance, memory bandwidth, and low latency in engineering applications

"Nvidia is deploying Vera across the EDA workflows used to create our future CPUs and GPUs, including simulation, formal verification, and physical implementation," Costa said. Early tests on Synopsys' VCS and Cadence' Jasper platforms showed the 1.5x advantage over AMD Epyc Torrent systems. "Its practical value is shorter simulation verification runs. Engineering teams can iterate faster. We are working with Cadence and Synopsys to optimize leading EDA applications for Vera by putting Vera to work helping design Rosa."

Rosa is Nvidia's next-generation CPU built on the Rigel core, scheduled to launch in 2028 as part of the upcoming Feynman datacenter platform.

How are Cadence and Synopsys using agents?

Cadence launched its AI Super Agent in February, an agentic tool for silicon design and verification, then announced partnerships with Nvidia, TSMC, and Google over the following two months. Last month it launched AuraStack AI Super Agent for front-end automated chip design and verification workflows.

According to Cadence, the AI Super Agents — under engineer direction — can run hundreds of simulations simultaneously, completing in less than a day work that currently takes five weeks, a 40-times speedup in Register-Transfer Level (RTL) validation cycles.

Synopsys this week announced agentic AI collaborations with AMD, Microsoft, and Intel alongside its Nvidia partnership. At the Design Automation Conference in California, it demonstrated its Fully Autonomous Design Verification Workflow, built on its agentic platform and AgentEngineer technology, incorporating Nvidia's Nemotron 3 Ultra model, Agent Toolkit, and OpenShell runtime. Synopsys says it delivers validated RTL 50 times faster than other platforms.

What's new in the Agent Toolkit?

Nvidia launched its Agent Toolkit in March, with the Nemotron models and OpenShell runtime as core components. A month ago it unveiled Nemotron 3 Ultra, an open model for agentic coding of chip designs. The latest expansion rearchitects PhysicsNeMo so agents can train and deploy AI physics models.

"PhysicsNeMo began as a framework that helped specialists build, train, and deploy AI models for AI physics," Costa said. "We are now organizing that expertise as a collection of open, composable libraries with agent-ready skills." The libraries cover physics-aware operations, GPU-native mesh processing, distributed training, and data curation, plus skills encoding repeatable instructions for model acceleration, training recipes, and data pipelines.

"The shift is from a framework an expert operates manually to AI physics capabilities an agent can invoke, compose, and validate inside a larger engineering process," he said.

CUDA-X also gains cuISS, a library of large sparse iterative solvers for physics and engineering simulations on GPUs, joining cuDSS for direct sparse solvers in EDA and scientific simulation and cuEST for quantum chemistry. "cuISS brings GPU-native iterative sparse solvers and preconditioning building blocks into CUDA-X," Costa said, since many engineering workloads reduce to very large sparse linear systems once partial differential equations are discretized.