Nota extends HyperAccel LPU optimization deal for second year

By Grace Kim

Nota will supply large language model (LLM) optimization technology to AI chip startup HyperAccel for a second consecutive year, building on an initial contract from September last year.

Nota said on the 13th that it had signed the follow-up contract, its second order from HyperAccel. The agreement covers optimization technology intended to let the latest AI models run efficiently on Verda LPU, an LLM inference chip that HyperAccel develops.

The arrangement targets data-center and enterprise AI markets. HyperAccel plans to widen the range of models that can run on its chips so the hardware can meet varied service demands from data centers and corporate customers.

“As the LLM inference market expands, the usability of AI chips that can support diverse models and be deployed in real service environments is becoming more important,” HyperAccel CEO Kim Joo-young said.

“Through continued technical cooperation with Nota, we will expand the range of models supported by Verda LPU and strengthen our product competitiveness,” he said.

Nota, which specializes in AI inference efficiency, will apply its own NetsPresso AI optimization platform to fit LLMs to Verda’s hardware characteristics. The work uses HyperAccel’s software development kit (SDK) and Legato, the chip startup’s proprietary language.

Technical scope of the follow-on order

The follow-on order combines three technical elements:

• NetsPresso will tailor LLMs to Verda’s hardware characteristics.
• HyperAccel’s SDK and Legato language will support kernel optimization, covering the routines that handle key computations.
• Quantization will lower a model’s numerical precision, reducing memory use and computational load.

The planned work gives the order two functions: it expands the set of models Verda can run and improves the execution efficiency of key computational routines. It also lowers numerical precision where quantization is applied, cutting memory demand and computational load.

“The competitiveness of an AI chip company is determined not only by excellent hardware but also by the software ecosystem that helps customers run the AI models they want quickly and efficiently,” Nota CEO Chae Myung-soo said.

“We will continue to expand cooperation with global AI chip companies and grow our software technology supply business, spanning everything from model optimization to computational kernels,” he said.

Chae tied the follow-up order to Nota’s broader software strategy: expanding cooperation with global AI chip companies and growing a software technology supply business covering model optimization and computational kernels. The deal also extends Nota’s role with HyperAccel from an initial supplier to a continuing software supplier.

What does this change for data-center and enterprise buyers?

For data-center and enterprise buyers, the practical change is broader model support on Verda, not an announced change to the chip’s specifications. The follow-on order is expected to make more of the latest LLMs usable on HyperAccel hardware and improve their execution efficiency, supporting deployments with different service requirements.

The announcement gives no shipment volume, deployment schedule or commercial value. It is a technology-supply agreement, not a quantified capacity or pricing announcement.

It also omits throughput, latency, memory-capacity, power and pricing figures. Buyers therefore have no disclosed performance or cost basis for comparing Verda with competing inference chips. What they do have is a stated development path: broader LLM compatibility, more efficient kernels and lower-precision operation through quantization.