The global semiconductor foundry market generated $320 billion in revenue in 2025, the highest annual total on record, with Taiwan Semiconductor Manufacturing Co. widening its lead over rival contract chipmakers, per Yahoo Finance reporting.

That single figure reshapes how analysts frame the merchant chip-production sector. Foundry revenue counts only wafers fabricated for outside customers, excluding captive output at integrated device manufacturers such as Intel and Samsung's in-house logic lines. The metric is therefore the cleanest read on demand from fabless designers — Nvidia, AMD, Qualcomm, Apple, Broadcom, MediaTek — that ship the bulk of advanced-node logic.

What drove the 2025 surge?

Three demand vectors converged during the year. AI training and inference accelerators consumed large blocks of advanced-node wafers, particularly at the 3 nm and 5 nm nodes. Smartphone system-on-chip volumes migrated to advanced packaging, lifting both front-end and back-end utilization. High-bandwidth-memory stacking pulled additional CoWoS and SoIC capacity online at facilities in Taiwan and Kumamoto.

Capacity utilization is the swing variable. A foundry operating above 90% utilization translates fixed costs into margin; below 80%, the same fabs post losses. Industry utilization hovered near the upper end of that band for most of 2025.

How far ahead is TSMC?

The headline frames TSMC as having "pulled further ahead" but does not specify a market-share figure. TSMC has ranked as the dominant merchant foundry since the late 2010s, with its share of leading-edge production generally estimated above 90%. Samsung Foundry, Intel Foundry Services, and United Microelectronics Corporation anchor the rest of the merchant top tier, followed by GlobalFoundries and specialty nodes at Vanguard and SMIC.

The competitive structure has hardened rather than loosened over the past three years. Capital intensity — extreme-ultraviolet lithography tools list above $200 million per unit — limits the number of credible leading-edge competitors to a handful. China's SMIC continues to expand mature-node capacity, but the leading-edge bracket remains closed to it under current export-control regimes.

What does the 2025 total imply for 2026?

Capacity additions arrive in lumpy waves. TSMC's Arizona Phase 2, Kumamoto second module, and Dresden fabs target production ramps across 2026 and 2027. If those ramps deliver on schedule, supply growth turns sharply higher. If demand from AI accelerators plateaus after the 2025 build-out, utilization rates and pricing absorb the shock first.

Customer prepayments and long-term wafer agreements now cover a larger share of capex than at any point in the industry's prior history. That mechanism softens the cyclical downside but does not eliminate it.

What to watch

• Quarterly foundry revenue prints from TSMC, UMC, GlobalFoundries, and SMIC.
• Utilization disclosures at the 3 nm and 5 nm nodes.
• CoWoS and SoIC packaging allocations, which act as the binding constraint for AI accelerator shipments.
• Capex revisions at Intel Foundry Services, where ramp pacing remains the swing factor for 2026 supply.

The $320 billion figure does more than set a record. It locks in a baseline against which the next downturn, and the next capacity wave, will be measured.