Test report DSG-2646 · Rev E · tested October 10, 2026

Foundries & ManufacturingDevice under test

ASML aligns Intel, TSMC, Samsung on 12-inch photomask shift, TSMC sets own timeline

ASML has secured alignment with Intel, TSMC, and Samsung on 12-inch photomask substrates, with TSMC the only customer to publicly commit to a production timeline, according to Digitimes.

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Elena Vasquez

Spec summary

  1. ASML has aligned Intel, TSMC, and Samsung behind a transition to 12-inch photomask substrates, per Digitimes
  2. TSMC is the only one of the three to publicly commit to a production timeline for 12-inch masks
  3. The shift moves mask substrates from 150 mm to 300 mm, matching the 300 mm wafer diameter in production since 2001
  4. A 12-inch blank covers roughly four times the area of a 6-inch blank, reducing per-die write time and exposure field count
  5. Digitimes does not specify the adoption date, the EUV or DUV layer priority, blank supplier capacity, or 300 mm blank pricing
ASML lines up Intel, TSMC and Samsung behind 12-inch masks — TSMC alone sets a timeline - digitimes.com
Fig. AASML lines up Intel, TSMC and Samsung behind 12-inch masks — TSMC alone sets a timeline - digitimes.com — AI-generated

ASML has secured alignment with Intel, TSMC, and Samsung on a transition from 6-inch to 12-inch photomask substrates, with TSMC the only one of the three to publicly commit to a production timeline, according to Digitimes reporting.

The shift would move mask substrates from the 150 mm format in use since the 1990s to 300 mm, matching the wafer diameter in high-volume production since 2001. The larger mask area is expected to cut per-die mask-write cost and reduce stitching errors by lowering the number of exposure fields required per reticle.

What is a 12-inch photomask, and why now?

Photomasks are the low-thermal-expansion glass plates onto which a circuit pattern is written and then optically projected onto a wafer during lithography. The current 6-inch (150 mm) format emerged alongside 200 mm wafer production in the 1990s. 300 mm wafers arrived in 2001; a 450 mm wafer generation was proposed and later shelved. A 12-inch mask format reuses the same substrate diameter as the wafer, which simplifies handling, storage, and inspection tooling across the supply chain.

A 12-inch blank captures roughly four times the area of a 6-inch blank, which cuts write time per die and reduces the number of exposures required to cover a reticle. For an advanced-node EUV mask set running to many tens of layers, the cumulative write-time saving flows directly into mask shop throughput and ultimately into per-die cost at the wafer fab.

Why TSMC alone has set a date

The Digitimes report identifies TSMC as the only member of the three-customer alignment with a public timeline. Intel and Samsung are reported to be evaluating insertion points without disclosed dates.

The pattern matches prior lithography transitions. TSMC took EUV to volume first at N7+, Samsung ran EUV in parallel, and Intel followed at 4 nm. Customer alignment ahead of capex commitment is required because the transition pulls investment at the fab, the mask shop, and the mask blank supplier, not at any one point in the chain.

What the Digitimes report does not specify

The reporting cited does not state:

  • The exact date or node at which TSMC will adopt 12-inch masks
  • Which layers (EUV, DUV, or both) will move first
  • 12-inch blank production capacity committed by suppliers
  • Pricing for 300 mm mask blanks

What remains to be confirmed

ASML has not released a public statement on the 12-inch transition in the Digitimes reporting. The Dutch lithography systems vendor's role is integration: aligning mask writer, blank supplier, pellicle maker, and end customer on a single roadmap before any customer can lock a production date.

The next reporting milestones to watch are:

  • TSMC's annual technology symposium, where mask-related roadmaps typically surface
  • Mask shop capex disclosures from Photronics, Toppan Photomasks, and DNP
  • Blank supplier investment announcements from Hoya and AGC
  • Any reference to 12-inch mask capability in ASML's quarterly lithography systems backlog commentary

If TSMC's timeline holds, the 12-inch transition is likely to track the 300 mm wafer rollout curve: slow adoption at first, then broader deployment, then 6-inch line phase-out over a multi-year window. The mask format shift, however, does not require a coordinated fab shutdown; existing 6-inch lines can run in parallel during the ramp, which limits the disruption to mask shop capital planning rather than fab output.

via Google News: TSMC (Source)

Filed under

  • asml
  • tsmc
  • photomask
  • euv
  • semiconductor-manufacturing
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Elena Vasquez

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Senior reporter covering industry trends and analytics at Die Signal.

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