TSMC plans capital expenditures of up to $64 billion — and a senior Applied Materials veteran says the world's largest contract chipmaker still "isn't building enough" capacity to meet demand.

The assessment comes from an executive with decades of experience at Applied Materials, one of TSMC's principal semiconductor equipment suppliers. Speaking to Yahoo Finance, the veteran framed the planned spending level as necessary but insufficient against the scale of silicon demand now building across the industry.

What does the $64 billion figure signal?

Capex of this magnitude places TSMC at the very top of global manufacturing investment, ahead of virtually every other company in the semiconductor supply chain. The spending covers:

• New fabrication capacity for leading-edge process nodes
• Expansion of packaging and advanced technology lines
• Equipment purchases from suppliers such as Applied Materials

The Applied Materials veteran's verdict — that TSMC "isn't building enough" despite the outlay — signals that demand from chip designers continues to outrun even the industry's most aggressive capacity plans. For a company of TSMC's scale to be told by a key equipment supplier that its buildout lags demand is a notable datapoint for anyone tracking the silicon supply picture.

Why does an equipment veteran's view matter?

Suppliers such as Applied Materials occupy a privileged vantage point on fab construction. Their order books reflect what foundries and memory makers actually commit to build, months before wafer output appears in public shipment figures. When a veteran of that industry says capacity additions are insufficient, the judgment rests on direct visibility into tool orders and fab timelines rather than on analyst models.

The comment also carries weight because of the relationship itself: Applied Materials sells the deposition, etch and inspection tools that fabs like TSMC's consume in the thousands. Equipment demand tracks fab construction almost one-to-one. A shortfall in building, from this seat in the supply chain, translates directly into a shortfall in tool shipments.

What does this mean for the chip market?

If TSMC is underbuilding at $64 billion of annual capital spending, the implication for customers is continued tightness. Chip designers that depend on TSMC's leading-edge nodes face the prospect of extended allocation, longer lead times and continued pressure on pricing — the standard mechanics of a market where capacity trails demand.

For equipment makers, the message is the inverse. Capacity that the largest foundry cannot add fast enough represents backlog: tools, service and upgrades that will be ordered as fast as fabs can absorb them. Applied Materials sits squarely in that flow.

The broader signal is structural. The veteran's statement suggests that the industry's constraint is no longer willingness to invest — TSMC is committing sums without precedent in manufacturing history — but the pace at which fabs, tools and skilled labor can physically be put in place. Money, in this cycle, is not the bottleneck.

The bottom line

TSMC plans up to $64 billion in capital expenditure. An Applied Materials veteran with direct visibility into the equipment pipeline says that is not enough. Demand for advanced silicon is outrunning even the largest capacity buildout the industry has ever attempted, and the effects — tight supply, heavy equipment backlogs, sustained investment — will shape the semiconductor market for as long as the gap persists.