Huawei has pulled its next-generation Ascend NPU roadmap forward by several quarters and confirmed that the upcoming Ascend 960PR delivers twice the FP4 throughput previously expected.

Tom's Hardware reported the disclosure following a Huawei briefing on the Ascend accelerator family. This is the most concrete public update to the company's domestic AI silicon plans since 2022, when U.S. export controls restricted Nvidia accelerator access in mainland China.

What does the schedule shift change for buyers?

Huawei's next Ascend parts will arrive earlier than originally planned. The acceleration — described as "several quarters" — points to a 2025 introduction window for at least the lead part, against a prior 2026-2027 shipment baseline Huawei had discussed with customers.

The shift lands as Chinese cloud operators finalize 2025-2026 training and inference capacity plans. Hyperscale and tier-two operators that had built Ascend deployments around the longer timeline can now expect earlier access, reducing the gap that Nvidia's H20 and licensed Blackwell-derived China parts had been assumed to fill.

What is the Ascend 960PR?

The 960PR sits at the top of Huawei's announced Ascend lineup and targets data-center training and inference workloads. Its defining feature is FP4 support — the 4-bit floating-point format that has become a competitive baseline across AI accelerator vendors since Nvidia introduced it on its Blackwell generation.

Huawei stated at the briefing that the 960PR's FP4 performance "doubles expectations" against figures previously communicated to customers. The wording points to internal targets Huawei had earlier shared with select accounts, now publicly exceeded by the silicon.

Why FP4 matters for AI workloads

FP4 compresses model weights and activations to 4 bits per parameter, reducing memory bandwidth pressure and on-chip SRAM requirements against FP8 and FP16 by roughly half per operand. The format preserves enough numerical range to train and serve large transformer models, which is why it has spread across accelerator roadmaps from 2024 onward.

A doubling of FP4 throughput on the 960PR narrows the per-chip inference gap that U.S. accelerators have historically held on large language model serving. Memory bandwidth, not raw compute, typically sets the ceiling on those workloads.

How does the 960PR sit in the Ascend family?

Huawei's current Ascend lineup includes the Ascend 310 for edge inference, the Ascend 910 series for data-center training and inference, and the previously disclosed 920 generation. The 960PR extends the family upward.

Tom's Hardware cited the Huawei briefing as the source for both the schedule shift and the FP4 figure. The underlying presentation deck has not been released publicly.

What remains undisclosed

Huawei has not published FP4 throughput in teraflops, memory bandwidth, process node, or TDP for the 960PR. Pricing has not been announced. Volume shipment dates are narrowed to "several quarters earlier" without a specific calendar window.

The two confirmed data points from the briefing — schedule pulled forward by several quarters, and 960PR FP4 performance at twice the previously expected level — point to a stronger Chinese accelerator line arriving within the originally planned calendar window. The disclosure tightens the planning horizon against which Nvidia's licensed China parts will compete through 2025 and into 2026.