Google Splits 8th-Gen TPU Line Into Four Chips

Google has released two new AI chips, the TPU 8tx and TPU 8i MAX, expanding its eighth-generation TPU (Tensor Processing Unit, Google's custom AI accelerator) family to four products. Google Cloud announced the launch on the 9th. It's the first time in more than a decade of TPU development that the company has shipped four TPUs in a single year.

The two new chips follow the TPU 8t and TPU 8i, introduced in April. Both are built for the era of AI agents — software assistants that carry out tasks on their own — and target three pain points: memory bottlenecks, slow data transfers and the security of agent workloads.

Why four chips instead of one?

Through the seventh generation, Google released a single TPU per generation. Starting with the eighth, it split the line by purpose: the 8t for training (teaching a model from data) and the 8i for inference (running a trained model). The 8t and 8i deliver up to 2.7 times the training performance of the previous generation and up to 80% better inference performance per dollar.

TPUs exist to maximize cost efficiency in Google's data centers and to sustain an ecosystem optimized for Gemini, the company's in-house AI model. The line's fragmentation into purpose-built variants reflects where AI workloads are heading.

What does the TPU 8tx change?

The 8tx is the security-focused member of the family. It supports small-scale training and inference while protecting personal data, and it's aimed squarely at heavily regulated companies and government agencies that need to push sensitive data through AI models and agents. Security functions are embedded inside the chip itself, protecting sensitive data in real time.

It's also fast where agents need it most. Because a low-latency network supports smooth agent execution, latency on the 8tx runs up to two times lower than on the TPU 8t.

What does the 8i MAX do differently?

The TPU 8i MAX takes a packaging approach: it links two TPU 8i chips, already optimized for low-latency inference, to boost computing power and speed. Google devised the design to address memory bottlenecks that arise when dozens of agents work together.

By scaling computing performance and memory capacity simultaneously, the 8i MAX offers:

• Twice the computing performance of the standalone TPU 8i
• Twice the bandwidth for high-bandwidth memory (HBM, stacked DRAM placed close to the compute die) and static RAM

The result, Google says, is large-scale computing with minimal latency.

What does this change for buyers?

For cloud customers running agentic workloads, the calculus now includes chip-level security and memory scaling rather than raw throughput alone. Google plans to keep expanding its range of specialized chips to match the growing diversity of AI workloads.

Mark Lohmeyer, vice president of AI and computing infrastructure at Google Cloud, framed the shift directly. The AI industry, he said, is moving from simple responses to agents that perform complex tasks, and far more complex agent workflows are creating infrastructure challenges unlike those of the past.

What matters now, according to Lohmeyer: how fast data can be moved, how efficiently memory is used, how latency can be minimized and how costs are managed. The four-chip lineup is Google's answer to each of those questions in silicon.