Test report DSG-6709 · Rev B · tested October 20, 2026

Memory & StorageDevice under test

CXMT HBM3 Yields Hit 25%, With Roughly 80 of 100 Chips Failing Tests

CXMT's HBM3 memory chips fail final tests at close to 80 out of 100 units, dropping yields to roughly 25%, a Wccftech report says.

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Amara Osei

Spec summary

  1. CXMT HBM3 yields have sunk to approximately 25%, per a Wccftech report.
  2. Close to 80 out of 100 HBM3 chips fail final tests.
  3. The yield problem affects CXMT's push into the high-bandwidth memory market.
CXMT Faces HBM Memory Chip Shock As Yields Sink To 25% With Close To 80 Out Of 100 HBM3 Chips Failing Final Tests, Says
Fig. ACXMT Faces HBM Memory Chip Shock As Yields Sink To 25% With Close To 80 Out Of 100 HBM3 Chips Failing Final Tests, Says — Gray_Rhee / pixabay

CXMT's HBM3 memory chips are failing final tests at a rate of close to 80 out of 100 units, leaving production yields at approximately 25%, according to a report published by Wccftech.

The figure marks a serious setback for the Chinese DRAM maker as it works to enter the high-bandwidth memory market, where suppliers must clear stringent qualification thresholds before their chips reach AI accelerator customers.

What does a 25% yield mean for CXMT?

Yield measures how many fabricated chips pass final testing. At 25%, CXMT discards close to 80 of every 100 HBM3 dies it produces before those chips can ship.

The consequences are mechanical:

  • Usable output per wafer drops sharply, raising effective cost per good chip.
  • Volume commitments to customers become harder to meet.
  • Qualification cycles with downstream buyers lengthen, since stable yields are a precondition for design wins.

For a memory maker competing against established HBM3 suppliers, that gap compounds at scale. Every percentage point of recovered yield translates directly into sellable capacity.

Why HBM3 yields are hard to raise

HBM3 stacks DRAM dies vertically and links them through silicon interposers and microbumps. That architecture multiplies failure points: each stacked layer must test clean, and the assembly steps between layers introduce their own defects.

Wccftech's report does not specify which stage drives CXMT's failures. It pins the number itself: close to 80 of 100 HBM3 chips do not pass final test, a pass rate near 25%.

Industry qualification for HBM3 typically demands far higher yields before suppliers can bid credibly for AI and datacenter contracts, where volume and reliability requirements are strict.

What comes next?

The report frames the situation as a shock to CXMT's HBM ambitions rather than an exit from the segment. Yield learning curves in memory production historically improve with process iterations, but the timeline depends on engineering fixes that the report does not detail.

Close to 80 failing chips out of every 100 means CXMT must recover roughly three-quarters of its losses before HBM3 becomes a viable product line.

via Google News: HBM memory (Source)

Filed under

  • hbm3
  • cxmt
  • dram
  • china-semiconductor
  • memory-yields
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Amara Osei

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Staff writer covering money, funding and market shifts around hardware layer of artificial intelligence at Die Signal.

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