Microsoft and AMD will build AI infrastructure spanning hundreds of thousands of GPUs and worth an estimated $5 billion to $10 billion, anchored by AMD's new "Helios" rack design and dedicated to running inference for frontier models on Azure.

What does the Helios rack contain?

The double-wide Helios rack houses 4,600 Zen 6 CPU cores across 18 compute trays. Each tray carries one AMD "Venice" Epyc 9006 CPU and four "Altair" MI455X GPUs. The 72 GPUs per rack deliver 18,000 GPU compute units, 2.9 exaflops at FP4 precision, 31 TB of HBM4 stacked memory, and 43 TB/sec of aggregate bandwidth routed through Pensando DPUs programmable in the P4 language.

Key per-rack specifications:

• 4,600 Zen 6 CPU cores across 18 compute trays
• 256 cores per Venice Epyc 9006 processor
• 72 MI455X GPUs producing 18,000 GPU compute units
• 2.9 exaflops at FP4 precision
• 31 TB aggregate HBM4 memory
• 43 TB/sec aggregate bandwidth via Pensando DPUs

The full hardware stack combines Altair MI455X GPUs, Venice Epyc 9006 CPUs, Pensando DPUs, and AMD's ROCm software stack. Microsoft has emerged as the dominant deployer of Pensando DPUs to date, a factor that shaped the integration approach.

What is the deployment target?

Neither Microsoft nor AMD disclosed the contract value. Industry estimates point to $5 billion to $10 billion covering hundreds of thousands of GPUs. The cluster targets inference workloads for frontier AI models on Azure rather than training.

Microsoft also committed to roll out Venice Epyc CPU clusters in two new Azure instance families:

• HDv2: optimized for agentic AI workloads and data pipeline processing
• HXv2: targeted at electronic design automation for chip design

Microsoft additionally plans to port its Azure Boost acceleration software onto Pensando DPUs. Microsoft originally built its own DPU for the November 2024 Azure Boost rollout; the new port moves its homegrown networking and storage virtualization routines onto P4.

How will scale-out and scale-up networking work?

Scale-out networking across Helios racks runs on Ethernet, with Arista Networks the likely switch supplier for that segment of the network.

Scale-up networking, which glues the HBM memory of the MI455X GPUs together inside each rack, remains unconfirmed. Microsoft and Meta Platforms both back the ESUN coherent memory fabric protocol, pitched as an alternative to Nvidia's NVLink/NVSwitch combination and to the UALink protocol AMD and partners launched in May 2024. Microsoft may begin with ESUN running on low-latency Ethernet switches in initial Helios racks, then migrate to UALink switches later.

How does this shift the AMD-Nvidia split at Microsoft?

According to industry analysis, Microsoft's GPU acquisitions split roughly 70/30 or 75/25 between Nvidia and AMD. The split effectively tracks HBM memory allocations: whoever controls the HBM controls the XPU shipments, since Nvidia currently holds the majority of HBM supply.

AMD's growing share of AI training and inference workloads at Microsoft implies its HBM allocations are also rising. If allocations do not expand in line with share, antitrust and restraint-of-trade lawsuits become a real risk for the chipmakers and their HBM suppliers.

AMD will provide further detail at its Advancing AI 2026 event in Silicon Valley this Thursday.