d-Matrix will present its Raptor 3D-DRAM accelerator for generative inference at Hot Chips 2026, the Santa Clara-based chipmaker has confirmed, marking the company's latest appearance at the semiconductor industry's premier technical symposium.

The announcement matters for anyone building inference infrastructure. d-Matrix has positioned itself squarely in the inference-only segment of the AI silicon market, and Raptor represents the next step in that roadmap. The "3D-DRAM" label in the design's name signals the company's core architectural bet: stacking memory directly on the compute logic rather than relying on conventional memory placed beside the processor.

Why does memory stacking matter for inference?

Generative inference is memory-bound work. Every token a large language model generates requires reading model weights and key-value cache data from memory, and the bandwidth between compute and memory — not raw compute throughput — typically sets the ceiling on tokens per second.

That's the problem 3D-stacked DRAM attacks. By placing memory in the same package, connected over short, dense vertical links, the design shortens the distance data has to travel. For operators running autoregressive models at scale, that translates into higher throughput per chip and better economics per million tokens served.

What do we know about Raptor so far?

Publicly available details ahead of the Hot Chips presentation remain limited. What's confirmed:

• Raptor is a dedicated generative-inference accelerator, not a general-purpose GPU.
• The design uses 3D-stacked DRAM as its defining memory architecture.
• d-Matrix will detail the chip at Hot Chips 2026.

The Hot Chips format itself tells practitioners what to expect. Presentations at the conference run deep on microarchitecture — die layouts, interconnect topologies, power delivery and measured performance — and d-Matrix's session should follow that pattern. If you're evaluating inference silicon roadmaps for 2026 and beyond, this is the presentation to watch for concrete numbers.

How does Raptor fit d-Matrix's trajectory?

d-Matrix has consistently argued that inference deserves purpose-built silicon rather than repurposed training hardware. The company's earlier Corsair generation targeted that thesis; Raptor, appearing at Hot Chips 2026, is the continuation.

The competitive context is worth keeping in frame. Memory bandwidth constraints now shape the whole inference-accelerator field, and multiple vendors are converging on packaging strategies that shorten the compute-to-memory path. A Hot Chips slot gives d-Matrix a venue to show exactly how its 3D-DRAM approach differs from what rivals are shipping — and whether the difference shows up where operators actually feel it, in cost per token.

For the practitioners in the room, the questions the presentation needs to answer are straightforward: how much stacked DRAM capacity sits on the compute die, what sustained bandwidth the design delivers, and how the part performs against incumbent GPUs on real inference workloads. Hot Chips 2026 attendees will get the first authoritative look.

We'll follow the technical details as they emerge from the conference sessions.