China's ChangXin Memory Technologies (CXMT) has confirmed it will release server DRAM built on a 4F² cell design this year, according to a report by the Seoul Economic Daily.

The announcement marks a concrete step in CXMT's transition toward denser DRAM cell architectures. A 4F² layout — named for the four minimum feature squares the cell occupies — allows manufacturers to shrink die sizes and raise bit density compared with the 6F² designs that still underpin much of mainstream DRAM production.

What does the 4F² design change?

The shift matters for two reasons:

• Density. A 4F² cell occupies roughly one-third less area than a 6F² cell, translating into more bits per wafer and lower cost per bit.
• Portfolio reach. Applying the design to server DRAM signals CXMT intends to compete beyond consumer and mobile segments, in a market long dominated by Samsung, SK hynix and Micron.

The company did not disclose additional technical parameters in the statement cited by the Seoul Economic Daily, and no production volumes, capacity figures or customer commitments accompanied the announcement.

Why does the timing matter?

A 2025 release window would put CXMT's server-grade 4F² parts in the market while incumbent suppliers ramp their own next-generation nodes. Server DRAM carries stricter qualification requirements than consumer memory: thermal endurance, reliability validation and long supply commitments typically gate entry.

For buyers, an additional qualified supplier of server DRAM would broaden the sourcing pool at a time when data center demand for memory continues to climb. For competitors, it signals that the performance gap between Chinese DRAM makers and the established trio continues to narrow.

What remains unconfirmed?

Several open questions follow the announcement:

• Which process node CXMT will use for the 4F² server parts
• Expected die sizes or bit densities
• Volume production schedules versus initial sampling
• Whether hyperscale or Chinese domestic data center operators have begun qualification

CXMT, based in Hefei, has expanded DRAM output steadily in recent years and now ranks among China's most advanced memory producers. The server DRAM commitment represents the company's most direct statement of intent yet for the data center segment.

The Seoul Economic Daily report did not indicate an exact launch quarter. CXMT has not published a public roadmap detailing the transition.

Industry watchers will track qualification cycles closely: server design-ins typically run 12 to 18 months from sampling to volume shipments, meaning measurable market impact from the new parts would follow the initial release by several quarters.