ASML booked record sales in the third quarter of its 2026 fiscal period, and the number still isn't enough. Industry reporting from DIGITIMES identifies a capacity gap for AI chip demand that persists through 2028, even at the Dutch supplier's new output highs.

The tension is structural, not cyclical. ASML (the world's only maker of EUV lithography machines, the scanners required to print leading-edge chips) sits at the narrowest point in the AI hardware supply chain. Every advanced accelerator — the GPUs and AI processors driving datacenter buildouts — passes through an ASML tool at some stage of fabrication. If scanner output caps out, wafer output caps out. Everything downstream inherits the constraint.

What does the record quarter actually tell us?

Two things at once. First, demand signal: record sales mean foundries and chipmakers are ordering at unprecedented rates, committing capital against AI roadmap volumes through the decade's back half. Second, the warning inside that headline: even record shipments leave a shortfall. DIGITIMES frames the story as a gap running through 2028 — a two-plus-year window in which AI chip demand is expected to exceed available manufacturing capacity.

That framing matters for planners. A capacity gap that survives record tool shipments isn't a supplier falling behind on execution. It's demand growing faster than even an expanded installed base can absorb.

Who feels the squeeze first?

The usual ordering applies. Leading-edge foundries absorb scanner capacity first, then allocate wafer supply to their largest AI customers. Downstream, that logic cascades:

• Foundries: capped wafer starts for leading-edge nodes through at least 2028
• AI chip designers: allocation, not availability, decides who ships accelerators on schedule
• Datacenter operators: hardware lead times stretch as accelerator supply lags deployment plans
• Competing demand: non-AI chips on advanced nodes compete for the same constrained wafers

What changes through 2028?

For buyers, pricing power stays with whoever controls scarce capacity — foundries at the wafer level, dominant chip designers at the product level. For ASML, the constraint is a comfortable one: a backlog measured in years and a customer base that can't source EUV anywhere else. The company's quarterly records will keep coming as shipments rise; the question DIGITIMES raises is whether the slope of capacity growth can ever match the slope of AI demand before the decade turns.

Nothing in the current picture suggests it does before 2028.

The bottom line

Record ASML sales in 3Q26 confirm the AI buildout is real and funded. They also confirm it's bigger than the tooling base serving it. Anyone modeling AI hardware volumes — cloud capex, accelerator shipments, foundry utilization — between now and 2028 should treat lithography capacity as the binding constraint, not as an assumption that scales on paper.

The machines that make the chips are now the story the chips can't outrun.